Program

DAY 1
september, 18th 2025
DAY 2
september, 19th 2025
9:00 H
18 september 2025
9:30 - 10:15 H
18 september 2025

Institutional Opening

10:15 - 10:45 H
18 september 2025

Premium Lecture I

Semiconductors Industry: Trends and Scenarios

10:45 - 11:45 H
18 de septiembre 2025

Executive Talent Forum

HR & Talent Strategies in Multinational Semiconductor Companies

Moderator: Iñigo Artundo,CEO, VLC-Photonics / Hitachi High-Tech

11:45 - 12:15 H
18 september 2025
12:15 - 13:15 H
18 september 2025

European Chips Act 2.0. Roundtable.

  • Pierre Chastanet, European Commission, Head of Unit for Cloud and Software
  • Oliver Schenck, European Parliament Member, EPP
  • Javier Ponce, Spanish Society Technological Transformation SETT, General Director
  • Moderator: Raquel Jorge, ADIGITAL, Directors of Europeans Affairs
13:15 - 14:00 H
18 september 2025

International Semiconductor Campus VLC: Evidence Paper

14:00 - 15:30 H
18 september 2025
15:30 - 18:30 H
18 september 2025

Best International Semiconductors Talent Practices

18:30 - 19:30 H
18 september 2025

II VLC Chip City Award Ceremony

Reading of the delivery certificate to Mr. Ray Stata . Online Live Conversation with Mr. Ray Stata and Eugenio Mallol, Director of Strategy and Communication at Atlas Tecnológico
20:30 - 22:00 H
18 september 2025

Dinner & Networking

Invitation only
09:00 - 09:45 H
19 september 2025

Premium Lecture II

Global Perspective and Dynamics of Semiconductors Talent

  • Lynette Ng, Deputy Corporate Head of HR, Taiwan Semiconductor Manufacturing Company (TSMC)
9:45 - 10:25 H
19 september 2025

Pilot Lines Talent Dynamics

Moderator: Alfonso Gabarrón, AESEMI, CEO. MicroNanoSpain

10:25 - 11:05 H
19 september 2025

AI & Data Centers

Moderator: Javier Cruz, Photonics Tech Lead, INECO-SETT

11:05 - 11:45 H
19 september 2025

Defense and Aerospace

11:45 - 12:15 H
19 september 2025
12:15 - 12:55 H
19 september 2025

Energy and Semiconductors

Moderator: Empar Martínez Bonafé, General Secretary, FEMEVAL

12:55 - 13:35 H
19 september 2025

Urban Dynamics and Infrastructure at the Service of Talent

13:35 - 14:10 H
19 september 2025

Entrepreneurship and Microchips

14:10 - 14:30 H
19 september 2025

Institutional Closing

14:30 H
19 september 2025

Split Sessions

Sala Navarro Reverter

12:30 - 13:30 H
19 september 2025

4th Meeting: Spanish Working Group on Europeans Chips Act 2.0

MANDATORY REGISTRATION

After its launch in December 2024 and subsequent meetings in Valencia, Barcelona, ​​and Madrid, the Spanish Working Group on the European Chips Act 2.0 will meet again in Valencia for its 4th working session. Its mission is to consolidate all the contributions of the Spanish microchip sector to the new strategic and budgetary framework for microchips in the EU in a Spanish Memorandum. The Spanish Group is a joint initiative of VaSiC and AESEMI. The initiative also includes the Spanish College of Telecommunications Engineers (COIT) and the ADIGITAL association. The group's general coordinator is Carlos G. Triviño.

13:30 - 14:30 H
19 september 2025

Spanish Chairs

ONLY STAFF AND CHAIR MEMBERS

The 17 Spanish Chairs of PERTE Chip will address the proposal to generate a joint report to describe their activities in a comprehensive and unified manner. The meeting is open only to Valencia Silicon Cluster staff and chair representatives.

III Valencia
Silicon Forum

Coming soon

4 and 5 June 2026. 
CaixaForum Valencia

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